As the demand for products with finer and finer features increases, alignment and overlay is becoming more difficult and product failure due to misalignment is becoming more prevalent. Even when the alignment metrology is perfect and the measured misalignment of an alignment mark near a chip is very small, distortion in the projected image of the mask due to mask writing errors and lens aberrations and in the wafer due to internal strains from prior processing steps can ultimately limit the alignment accuracy.
There are numerous sources of potential distortion in a mask pattern or in its projected image (if it is a photomask) relative to an existing pattern on a silicon wafer. Some of these sources and their properties are described below.
The electron beam (e-beam) tool used for mask patterning may make mistakes during the write step. Fortunately, in a typical projection lithography tool, the mask pattern is four times larger than the wafer pattern and small, discrete errors, such as a missing micron of chrome, can be corrected by ion implantation. However, long-range errors, such as an entire segment of a mask being displaced (by 0.25 microns for example) cannot be corrected and, if out of tolerance, the mask must be discarded. Mask writing errors vary from mask to mask, and thus each mask must be inspected. To significantly reduce mask writing errors below current levels would greatly increase mask costs. Further, the processing of a photomask may introduce strains (mask strain) in its fused-silica substrate and, hence, lead to pattern distortions.
Wavefront errors in the projection lens also may distort the projected image. This is called lens distortion. Distortion often limits the maximum field size a lens can project. In many cases the image is best near the optic axis and deteriorates at increasing radii. In scanning systems, some of the lens distortion tends to be averaged out, but at the price of a fuzzy line edge. If the same lens is used to make both the wafer pattern and the projected image of the mask, the lens distortions will be almost identical and will not lead to significant overlay errors. However, if different lenses are used for the two lithographic levels, lens distortion can be a significant problem.
Further, the silicon wafer may be distorted in x and y (affecting alignment) and z (affecting focus) during processing steps such as, heating, cooling, and the removal or addition of material under stress. These distortions vary greatly from wafer to wafer in different lots and even to some extent from wafer to wafer within the same lot. U.S. Pat. No. 5,094,536 to MacDonald et al. discloses a system where a wafer chuck is distorted in the z direction. In MacDonald et al., vertical distortions in the wafer (distortions out of the plane of the wafer surface) are corrected using piezoelectric actuators to increase the depth of focus. Other techniques, such as grinding the wafer to achieve a high degree of smoothness and pulling the wafer flat with a vacuum chuck, have also been used to reduce out-of-plane distortions. A wafer with significant out-of-plane distortions may be covered with a smooth, flat organic layer which is then covered with the photoresist—since the resist is on a flat surface, the projected image will be in focus over the whole wafer. It is noted that out-of-plane distortions may introduce some lateral distortions because the wafer is stretched when pushed out of plane.
Still further, the translation and rotation stages are not perfect and can position the wafer in slightly the wrong place. In a scanning system, the mask position is also subject to stage error.
In every level but the first, the projected image of the mask is aligned to a previous lithographic level on the wafer. Each chip on a particular level is subject to all of the errors, described above, produced during the printing of that level. Since the mask errors at two different levels can be drastically different, the error between the projected image (the current level) and the wafer pattern (a previous level with a different mask) can be significant.
Distortions can also be created by a chuck that is not holding the wafer (or mask) properly, by temperature effects, or by other environmental factors. In practice, many distortions are found to vary continuously, some across the whole wafer and some only across a chip. Still others vary discontinuously from chip to chip. To compensate for such distortions, sufficient misalignment information must be acquired to make an accurate distortion map of the mask/wafer system.
A case where a projected image of the mask and the existing pattern on the wafer are squares of equal size is a good example. If the two squares do not overlap, they can be brought into alignment simply by moving the mask or the wafer stage. If, however, distortion is present and one of the squares is actually a parallelogram or a square of a different size, the two shapes cannot be made to overlap by stage motions alone because their shapes are not congruent. While it is possible to bring part of the patterns into alignment, it is impossible to achieve alignment over the entire image field.
The same overlay problems exist in other types of lithography in which there is no projection lens and hence, no projected image. In these types of lithography, the mask itself is aligned with the pattern on the wafer. An example is nano imprinting, a sub-50 nm lithography technique, in which the resist pattern is directly stamped on the wafer. Optical contact printing, proximity printing, and x-ray proximity printing are all lensless lithographic techniques that may suffer the same overlay problems.